Top-Down and Bottom-Up Manufacturing Combined in One Technique

An international team of researchers has combined ink-jet printing and self-assembling block copolymers to create a hybrid between top-down and bottom-up manufacturing. This new hybrid approach to building nanostructures promises to overcome the obstacles of fabricating nanostructures out of polymers and other soft materials.

The research, which was published in the journal Nature Nanotechnology (“Hierarchical patterns of three-dimensional block-copolymer films formed by electrohydrodynamic jet printing and self-assembly”),  found that by using self-assembling block copolymers  in combination with ink-jet printing that the resolution for even the best ink jet printers  could be improved from approximately 200 nanometers down to about 15 nm.

Block copolymers are chain like molecules made up of blocks of two types of chemicals. (Imagine a string of Christmas lights having a repeating pattern of 5 green lights and 5 red lights.) Under the right circumstances, such copolymers can fold up to form patterns such as a repeating array of holes.

The ITRS roadmap has long identified block copolymers for use in reducing chip feature sizes. For years block copolymers have demonstrated their usefulness in creating self-assembled photoresists for chip manufacturing.

While the potential for self-assembling block copolymers have long been understood, this work—which is a cooperative effort of researchers from University of Illinois at Urbana-Champaign, the University of Chicago, and Hanyang University in Korea—adds an important twist.

“The most interesting aspect of this work is the ability to combine ‘top-down’ techniques of jet printing with ‘bottom-up’ processes of self-assembly, in a way that opens up new capabilities in lithography—applicable to soft and hard materials alike,” said John Rogers, a materials science professor at Illinois and one of the authors of the paper, in a press release.

In the work described, the international team turned to the Belgium-based nanoelectronics powerhouse Imec to create chemical patterns over large areas of a substrate with high precision. The research team in Illinois then used ink jet printing to deposit block copolymers on top of these patterns. The block copolymers would self-organize following the patterns laid on the underlying template. The result was that it created patterns that had a greater resolution than the template itself.

While previous work had managed to deposit films on these templates, the result was that the patterns only possessed one characteristic feature size and spacing. With the ultra-precise ink-jet printing tool, it became possible to create multiple dimensions in one layer.

“This invention, to use inkjet printing to deposit different block copolymer films with high spatial resolution over the substrate, is highly enabling in terms of device design and manufacturing in that you can realize different dimension structures all in one layer,” said Paul Nealey, a professor at the University of Chicago and co-author of the paper, in the press release. “Moreover, the different dimension patterns may actually be directed to assemble with either the same or different templates in different regions.”

Image: Serdar Onses/University of Illinois-Urbana

Ref: http://spectrum.ieee.org/nanoclast/semiconductors/nanotechnology/topdown-and-bottomup-manufacturing-combined-in-one-technique

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Despite wave of sales and bankruptcies, ‘thin-film’ solar dream still alive

Five years ago, a promising solar technology was all the rage in Silicon Valley. Several startups were experimenting with a compound known as CIGS — shorthand for copper indium gallium selenide — that advocates said represented a great leap for the industry. Known as “thin-film” because of the thin and flexible panels, the promise of CIGS was that it would be less expensive to manufacture than traditional silicon-based solar panels but still highly efficient at turning the sun into electricity.

Startups like MiaSolé, Nanosolar, SoloPower, Solyndra and others attracted massive amounts of funding from some of the valley’s top venture capital firms. But the timing was terrible. Chinese manufacturers began aggressively pricing silicon-based panels and driving costs down just as the CIGS companies were trying to get their manufacturing lines up and running. Then the global recession hit, leaving Silicon Valley littered with CIGS companies that filed for bankruptcy, were sold at fire-sale prices or struggled on.

But while Silicon Valley’s CIGS dream largely imploded, work on the technology continues at the nation’s top energy labs and universities, and some say CIGS still holds enormous potential. Lux Research estimates that the market for solar installations based on CIGS thin-film panels will reach $2 billion in 2015, as manufacturers improve efficiencies.

“The book isn’t entirely closed on CIGS,” said Shayle Kann, vice president for research at Greentech Media. “CIGS was a new technology with complex manufacturing processes that require scale and maturation to be competitive. A lot of companies were trying to scale but it was the worst possible timing: The price of silicon panels was falling through the floor. Solar Frontier is the only CIGS company that is operating at large scale.”

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Transistor Life Extension Tech Goes Into Full Production

Things seem to be picking up for SuVolta. Two years after the Los Gatos, Calif.-based start-up emerged from stealth mode, the first chips made using the company’s approach to energy savings may soon be set to ship. On Tuesday, the company announced that its first partner, Fujitsu, has begun volume production of an image processing integrated circuit that uses SuVolta’s technology.

SuVolta’s transistor design uses precision doping in order to lower power consumption and boost chip performance. When the company debuted, start-up executives pitched the approach as a simpler alternative to two other ways to improve transistor performance: moving to a 3-D structure, as Intel has and as the chip foundries are getting ready to, or building still-planar transistors on wafers that contain a thin layer of insulation. Those two techniques are often seen as rivals, although they can be used together (last year, for example, wafer manufacturer Soitec announced a new wafer line that it hopes will make it easier for chipmakers to adopt both).

While those alternate transistor designs are being adopted for the smallest transistors and most cutting-edge chips, SuVolta’s first integrated circuit is squarely in the middle of the pack; it’s made using a 55-nanometer manufacturing process, which is about six years behind today’s most advanced 20- and 22-nm chips.

That’s not a bad thing: many chips are still made using older manufacturing processes—more than half, according to the company’s press release—and there is likely a lot of value that can still be eked out of such technologies with optimization. But development is also afoot on the cutting-edge. When I spoke with Jeff Lewis, SuVolta’s senior vice president for business development and marketing, in July, he told me there is effort underway to apply the company’s special sauce to more advanced chips. But he said the company is constrained from providing details by its partners, who ultimately decide if and how they discuss new products. “The majority of the company’s activity has actually been focused on 28 and 20, but we haven’t been able to talk about it,” Lewis said.

Lewis said the company has six “engagements” with chipmakers, at manufacturing processes ranging from 65-nm to 20-nm. One is a recently announced partnership for 28-nm chips with Taiwan-based foundry UMC. Production of such chips won’t start before 2015, according to an EETimes report. In the meantime, chipmakers are pushing their way down to 14 nm, with a variety of other technologies to assist them.

Image: SuVolta

Ref: http://spectrum.ieee.org/tech-talk/semiconductors/devices/transistor-life-extension-tech-goes-into-full-production

Webinar Announcement: The 9 Behaviors that Get Technical Professionals Promoted

Amazing webinar to attend, I am adding whole description below, Register ASAP:

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ASME North American Pacific District D Presents

The 9 Behaviors that Get Technical Professionals Promoted

Saturday, Sept. 21, 2013
10:00 AM to 11:00 AM (Pacific Time)
1:00 PM to 2:00 PM (Eastern Time)

Check-in begins at 9:30 AM (Pacific Time)
Register Now! https://9behaviorsgetyoupromoted.eventbrite.com/

ASME Members: $27.50
Students, Sponsors and Unemployed: $15
General Registration: $69

The 9 Behaviors that Get Technical Professionals Promoted
How YOU think about…
• Taking initiative
• Leadership: Like a Partner
• Having a “Big Picture” perspective
• Networking
• Self-Management
• Understanding Your Organization
• Following: “Leave Your Ego at Home”
• Telling Your Story to get Results
• Teamwork: Being on a Team
• Follow-Through

…and advance in their career to manager!
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Optimizing spherical cap patterned sapphire for nitride semiconductor LEDs

Researchers in Guangdong province, China, have been exploring the potential for improved light extraction from nitride semiconductor light-emitting diodes (LEDs) on patterned sapphire substrates with spherical cap bumps [Haiyan Wang et al, Jpn. J. Appl. Phys., vol52, p092101, 2013].

Patterned sapphire substrates (PSSs) can improve LED performance by improving the crystal quality of the light-emitting nitride semiconductor material and enhancing light extraction. Gallium nitride (GaN) semiconductor LEDs on flat sapphire suffer from total internal reflection back into the device due to larger differences in refractive index. Patterning can reduce the amount of reflection. Hemispherical and truncated cones are popular shapes for such patterning.

The team from South China University of Technology and NVC Lighting Technology Corporation first performed extensive simulations of different spherical cap geometries to find the optimum radius, height and spacing. The simulations suggested that a 10% enhancement in light output could be achieved with flip-chip packaged LEDs where the radiation is mainly through the substrate and side-walls of the device.

The researchers then prepared two different patterned sapphire substrates: one (HPSS) with 3.45μm-radius hemispherical bumps with 1.6μm edge spacing, and the other an optimized 3.4μm-radius spherical cap (SCPSS) of 2.78μm height with 1.7μm edge spacing (Figure 1). The bumps were arranged in hexagonal arrays to match the crystal structure of the overlying nitride semiconductor material. The patterning was performed by inductively coupled plasma etch where the etch time and plasma flux were controlled.

Figure 1

Figure 1: As-prepared spherical cap-shaped PSS. (a) In-plane scanning electron micrograph and (b) low-magnification cross-sectional transmission electron micrograph after epitaxial growth of LED structure.

The researchers point out that, since the etch depth for the SCPSS is less than for HPSS, less photoresist and shorter etch times are required compared with HPSS fabrication. Consequently, fabrication costs would be reduced – a very promising feature for ‘industrial mass production’.

Nitride semiconductor layers were applied using metal-organic chemical vapor deposition (MOCVD). X-ray analysis suggested that the quality of the crystal structures were similar on the different structures, so any difference in performance should be mostly attributed to differences in light extraction and not internal quantum efficiency.

Figure 2

Figure 2: Comparison of EL spectra from LED chips grown on HPSS, up-to-date commercial PSS, and SCPSS.

The electroluminescence (EL) measurements showed a 12% increase in intensity for LEDs produced on the optimized SCPSS substrate (Figure 2). The researchers also compared their devices with LEDs produced on commercial patterned sapphire with cone-shape bumps. The optimized SCPSS LEDs demonstrated a 15% increase in intensity over LEDs produced on commercial patterned sapphire.

Visit: http://jjap.jsap.jp/link?JJAP/52/092101/

Ref : http://www.semiconductor-today.com/news_items/2013/SEP/SCUT_030913.html

Lab-on-a-chip technology gets a flexible upgrade

Lab-on-a-chip technology gets a flexible upgrade
Microfluidic devices move liquids through tiny, hair-sized pathways carved into glass slides and have distinct advantages over traditional laboratories when it comes to medical diagnostics. At these reduced scales, fluid transport is enhanced by factors such as diffusion and high surface-to-volume ratios, making testing procedures much faster. By constructing parallel arrays of microfluidic pathways, researchers are working to produce ‘lab-on-a-chip’ technologies that allow multiple biological tests to be performed using just a drop of blood or urine. In a development that promises to make lab-on-a-chip devices more portable and economic to construct, Yo Tanaka from the RIKEN Quantitative Biology Center and colleagues have now produced a new type of microfluidic control valve that takes up significantly less space on a microchip than existing approaches.
In the majority of today’s microfluidic devices, silicone pneumatic valves are used to manipulate liquid samples. Pneumatic valves, however, require noisy compressors and complicated air channel systems, which are often too bulky for practical lab-on-a-chip applications. Piezoelectric actuators—inorganic crystals that change shape when electrically stimulated—are feasible alternatives, but while piezoelectric materials are less obtrusive than pressurized air technology, they are excessively large when compared to the size of the microchip itself.
Tanaka and his colleagues instead investigated the remarkable properties of electroactive polymers. These materials are rubber-like organic compounds that expand and contract when exposed to an electric current. As electroactive polymers can exhibit large mechanical strain force at small scales, the team deduced that creating membranes incorporating these materials could be a promising way to miniaturize microfluidic control valves.
After experimenting with many valve shapes, the researchers settled on a micrometer-sized, dome-shaped polymer diaphragm sandwiched between soft electrode sheets (Fig. 1).
Lab-on-a-chip technology gets a flexible upgrade
A novel electroactive polymer stop valve for lab-on-a-chip technology

Composite for smarter windows

Residential and commercial buildings account for about 40% of energy use and about 30% of energy-related carbon emissions in the United States1. To decrease this energy demand, materials are needed that help to regulate the heating and lighting requirements of buildings by responding to environmental changes. In particular, electrochromic window materials, which change colour and/or transparency when subjected to an electric field, could significantly reduce energy consumption in buildings.

Brian A. Korgel is in the Department of Chemical Engineering, Center for Nano- and Molecular Science and Technology, Texas Materials Institute, The University of Texas at Austin, Austin, Texas 78712, USA.